Candidates are required to do hybrid working in one of Cambridge or Bristol.Our client make hardware-accelerated architecture enables real-time transactional AI at scale, eliminating bottlenecks in data-intensive environments.Main Responsibilities:Design, develop, and verify FPGA modules in Verilog/SystemVerilog and VHDLTranslate novel functional computing models into optimised RTL architecturesImplement high-throughput, pipelined digital logic and memory interfacesContribute to simulation, synthesis, debug, and validation of designs on Altera Agilex FPGAs and/or AMD Xilinx VersalCollaborate on architectural evaluation of latency, power, and scalabilityWrite clean, maintainable RTL and contribute to documentation, DFT/DFM, and version control workflowsKey Requirements:Minimum 7 years of post-graduate experience in digital hardware design (FPGA/ASIC) and Verilog/SystemVerilog experience (or 15 years total experience with strong VHDL background)High-level logic synthesis and simulation toolsHands-on experience with Intel Quartus Prime Pro toolchainRTL design in Verilog/SystemVerilog and/or VHDLTech Stack:Quartus Prime Pro, Vivado, ModelSim, QuestaVerilog, SystemVerilogC, C++, Python, Haskell, Erlang, TCLGit, JiraDesirables:PCI3 Gen 6 experienceExperience with Intel/Altera Agilex 5E FPGAsVHDLExposure to compute-in-memory, functional or dataflow architecturesUVM or equivalent verification experiencePlease get in touch with daniel@microtech-global.com to hear more about this incredible position
