
PMU Design Verification Intern
- Swindon
- Training
- Full-time
- Currently pursuing a BS, MS, or PhD in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related field.
- At the end of the internship, you must return to school to continue your education or the internship must be the last requirement for you to graduate.
- Strong familiarity with understanding RTL design in Verilog/VHDL and logic structures being inferred Very good understanding of OOP basics and experience/exposure of using HDLs/HVLs such as SystemVerilog and/or UVM
- Excellent interpersonal skills and well-organised working style
- Strong analytical/problem solving skills
- Ability to work well in a team and be productive under tight schedules
- Knowledge of finite state machine, CPU bus architectures and mixed signal design/verification is desirable